Author: WaelBadawy
Towards an H.264/AVC HW/SW Integrated Solution: An Efficient VBSME Architecture
Abstract:
This paper presents an efficient real-time variable block size motion estimation architecture. The proposed architecture provides motion vectors for each 16 times 16 block and its 40 sub-blocks. The proposed architecture is a single-instruction multiple-data architecture integrated with embedded SRAMs on one chip. The architecture has been prototyped using Xilinx Virtex-4 XC4VSX35-10 field-programmable gate array. It processes 30-CIF fps using 71-MHz clock frequency. Its maximum clock frequencyuency is 187.7 MHz and the maximum throughput is 20 4CIF fps. The prototyped architecture has 175 k gates and 18 kbits embedded SRAM.
Published in:
Circuits and Systems II: Express Briefs, IEEE Transactions on (Volume:55 , Issue: 9 )
- Page(s):
- 912 – 916
- ISSN :
- 1549-7747
- INSPEC Accession Number:
- 10185530
- DOI:
- 10.1109/TCSII.2008.923398
- Date of Publication :
- 23 May 2008
- Date of Current Version :
- 29 August 2008
- Issue Date :
- Sept. 2008
- Sponsored by :
- IEEE Circuits and Systems Society
- Publisher:
- IEEE
Mohammed Sayed, Wael Badawy, and Graham Jullien, “Towards an H.264/AVC HW/SW Integrated Solution: An Efficient VBSME Architecture”, IEEE Transactions on Circuits and Systems II, Volume: 55, Issue: 9, pp. 912-916, Sept. 2008.
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Giveaway Events: The Money is in the Back End
Think the money is in the list? Think again.
The real money is in the follow-up. Without a great back end to support your list-building efforts, you’ll wind up with a huge list of names that do little but cost you money. And nowhere is that more true than with a big giveaway event.
Think about it. You’ll spend time and money—and lots of it—just organizing your event. Between the design work, recruiting guests, writing copy, and setting up the infrastructure, you’re going to spend dozens of hours.
The way to make up for that is with a solid back end that brings in sales each and every day.
Two Pages to Monetize
Want to know the most underutilized page on your site? It’s the confirmation page. You know, that page where new opt-ins land while they wait for your confirmation email to arrive? If yours says something like “Thanks, now go check your email” (or worse, it’s AWeber’s or Lead Page’s default page) then you’re missing a golden opportunity.
This is potentially the first exposure your new subscriber has to you, so it pays to make it a good one. This is the place where you should be offering a low-cost product that is a natural fit with your freebie. So in this case, your free offer is the giveaway event. Think about your products. Which one will help participants make the most of the event? That’s the one to offer on the confirmation or thank you page. And if you can offer a coupon, even better!
The download page is another often overlooked opportunity. Give your readers a relevant offer that ties in nicely with their download (or in this case, the gifts they’re receiving) and you’ll be pleasantly surprised at the number of takers you get.
Email Still Works
Don’t forget the follow-up emails. Hopefully you’ve created a series of emails to go out after a subscriber joins your list. These are the perfect place to make offers of relevant products and services, either yours or those of your event guests. You don’t have to resort to hard sell tactics in every email though—and you probably shouldn’t.
Instead, send your subscribers valuable information they can use, so they learn to look forward to your emails. Save the selling for your P.S. or for the occasional (once per week or less) solo email.
Done right, these two techniques can ensure you not only earn back your investment in creating your giveaway event, but earn a tidy profit as well. Not only that, but these strategies work for every opt-in offer on your site, so be sure to take a look at your other funnels and patch up any leaks you might have.
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An Architecture for Programmable Multi-core IP Accelerated Platform with an Advanced Application of H.264 Codec Implementation
Abstract
A new integrated programmable platform architecture is presented, with the support of multiple accelerators and extensible processing cores. An advanced application for this architecture is to facilitate the implementation of H.264 baseline profile video codec. The platform architecture employs the novel concept of virtual socket and optimized memory access to increase the efficiency for video encoding. The proposed architecture is mapped on an integrated FPGA device, Annapolis WildCard-II™ or WildCard-4™, for verification. According to the evaluation under different configurations, the results show that the overall performance of the architecture, with the integrated accelerators, can sufficiently meet the real-time encoding requirement for H.264 BP at basic levels, and achieve about 2–5.5 and 1–3 dB improvement, in terms of PSNR, as compared with MPEG-2 MP and MPEG-4 SP, respectively. The architecture is highly extensible, and thus can be utilized to benefit the development of multi-standard video codec beyond the description in this paper.
Yifeng Qiu, Wael Badawy and Robert Turney, “An Architecture for Programmable Multi-core IP Accelerated Platform with an Advanced Application of H.264 Codec Implementation” Journal of Signal Processing Systems, Volume 57, Number 2 / November, 2009, 123-137.
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