Low power very large scale integration prototype for three-dimensional discrete wavelet transform processor with medical application

We present a low-power 3-D discrete wavelet transform processor for medical applications. The main focus is the compression of medical resonance image (MRI) data, although the system could be used as a generic compression chip. The architecture eliminates redundant filter banks by using a central control unit to dynamically adjust filter parameters. An on-chip cache is used to process block inputs minimizing result throughput. Power consumption has been kept to a minimum by placing constraints throughout the entire design process. The modular processor has been prototyped using 0.6-μm complementary metal oxide semiconductor (CMOS) (three metal) technology. It has been simulated at the functional, circuit, and physical levels. The performance measures of the prototype, area, time delay, power, and utilization have been evaluated. The prototype operates at an estimated frequency of 272 MHz and dissipates 0.5 W of power.


Wael Badawy, Michael Talley, Guoqing Zhang, Michael Weeks, and Magdy Bayoumi, “Low Power Very Large Scale Integration Prototype for Three-Dimensional Discrete Wavelet Transform Processor with Medical Applications,” The SPIE Journal on Electronic Imaging, Vol. 12, Issue 2, April 2003, pp. 270 – 277.


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