structured mesh topology Archives - Dr. Wael Badawy https://badawy.ca/tag/structured-mesh-topology/ From Idea to Innovation Thu, 22 Feb 2018 18:02:02 +0000 en-US hourly 1 63363634 Algorithm-Based Low Power VLSI Architecture For 2d-Mesh Video Object Motion Tracking https://badawy.ca/2018/09/05/algorithm-based-low-power-vlsi-architecture-for-2d-mesh-video-object-motion-tracking-2/ Wed, 05 Sep 2018 14:28:00 +0000 http://www.badawy.ca/?p=541 The new VLSI architecture for video object (VO) motion tracking uses a novel hierarchical adaptive structured mesh topology. The structured mesh offers a significant reduction in the number of bits that describe the mesh topology. The motion of the mesh nodes represents the deformation of the VO. Motion compensation isRead More

The post Algorithm-Based Low Power VLSI Architecture For 2d-Mesh Video Object Motion Tracking appeared first on Dr. Wael Badawy.

]]> The new VLSI architecture for video object (VO) motion tracking uses a novel hierarchical adaptive structured mesh topology. The structured mesh offers a significant reduction in the number of bits that describe the mesh topology. The motion of the mesh nodes represents the deformation of the VO. Motion compensation is performed using a multiplication-free algorithm for affine transformation, significantly reducing the decoder architecture complexity. Pipelining the affine unit contributes a considerable power saving. The VO motion-tracking architecture is based on a new algorithm. It consists of two main parts: a video object motion-estimation unit (VOME) and a video object motion-compensation unit (VOMC). The VOME processes two consequent frames to generate a hierarchical adaptive structured mesh and the motion vectors of the mesh nodes. It implements parallel block matching motion-estimation units to optimize the latency. The VOMC processes a reference frame, mesh nodes and motion vectors to predict a video frame. It implements parallel threads in which each thread implements a pipelined chain of scalable affine units. This motion-compensation algorithm allows the use of one simple warping unit to map a hierarchical structure. The affine unit warps the texture of a patch at any level of hierarchical mesh independently. The processor uses a memory serialization unit, which interfaces the memory to the parallel units. The architecture has been prototyped using top-down low-power design methodology. Performance analysis shows that this processor can be used in online object-based video applications such as MPEG-4 and VRML

Wael Badawy and Magdy Bayoumi, “Algorithm-Based Low Power VLSI Architecture For 2d-Mesh Video Object Motion Tracking,” The IEEE Transaction on Circuits and Systems for Video Technology, Vol. 12, No. 4, April 2002, pp. 227-237

The post Algorithm-Based Low Power VLSI Architecture For 2d-Mesh Video Object Motion Tracking appeared first on Dr. Wael Badawy.

]]> 2201 Algorithm-Based Low Power VLSI Architecture For 2d-Mesh Video Object Motion Tracking https://badawy.ca/2018/05/09/algorithm-based-low-power-vlsi-architecture-for-2d-mesh-video-object-motion-tracking/ Wed, 09 May 2018 22:48:00 +0000 http://www.badawy.ca/?p=541 The new VLSI architecture for video object (VO) motion tracking uses a novel hierarchical adaptive structured mesh topology. The structured mesh offers a significant reduction in the number of bits that describe the mesh topology. The motion of the mesh nodes represents the deformation of the VO. Motion compensation isRead More

The post Algorithm-Based Low Power VLSI Architecture For 2d-Mesh Video Object Motion Tracking appeared first on Dr. Wael Badawy.

]]> The new VLSI architecture for video object (VO) motion tracking uses a novel hierarchical adaptive structured mesh topology. The structured mesh offers a significant reduction in the number of bits that describe the mesh topology. The motion of the mesh nodes represents the deformation of the VO. Motion compensation is performed using a multiplication-free algorithm for affine transformation, significantly reducing the decoder architecture complexity. Pipelining the affine unit contributes a considerable power saving. The VO motion-tracking architecture is based on a new algorithm. It consists of two main parts: a video object motion-estimation unit (VOME) and a video object motion-compensation unit (VOMC). The VOME processes two consequent frames to generate a hierarchical adaptive structured mesh and the motion vectors of the mesh nodes. It implements parallel block matching motion-estimation units to optimize the latency. The VOMC processes a reference frame, mesh nodes and motion vectors to predict a video frame. It implements parallel threads in which each thread implements a pipelined chain of scalable affine units. This motion-compensation algorithm allows the use of one simple warping unit to map a hierarchical structure. The affine unit warps the texture of a patch at any level of hierarchical mesh independently. The processor uses a memory serialization unit, which interfaces the memory to the parallel units. The architecture has been prototyped using top-down low-power design methodology. Performance analysis shows that this processor can be used in online object-based video applications such as MPEG-4 and VRML

Wael Badawy and Magdy Bayoumi, “Algorithm-Based Low Power VLSI Architecture For 2d-Mesh Video Object Motion Tracking,” The IEEE Transaction on Circuits and Systems for Video Technology, Vol. 12, No. 4, April 2002, pp. 227-237

The post Algorithm-Based Low Power VLSI Architecture For 2d-Mesh Video Object Motion Tracking appeared first on Dr. Wael Badawy.

]]> 541